Compute Silicon Architect

Facebook | Redmond, WA

Posted Date 12/20/2018
Description Oculus Research, the research division of Oculus (Facebook), is looking for a Compute Silicon Architect who will work with a world-class group of researchers and engineers. This candidate will understand the full stack from algorithms and architecture down to silicon back end and qualification to ensure consistency from Architecture to Product. We are seeking a Silicon Architect to drive a silicon design that includes functions such as image compute, display, 3D sensing (SLAM), environment and body tracking, user interface and sound.


  • Architect designs to surpass state of the art for metrics such as compute, bandwidth and power consumption.

  • Work across disciplines, brainstorm big ideas, work in new technology areas, juggle/coordinate multiple initiatives, drive a concept into a prototype and ultimately guide the transition into a high-volume consumer product.

  • Make trade-offs between general purpose and custom compute mechanisms.

  • Model data-flows, create detailed cost/benefit analysis and estimate power consumption.

  • Perform architectural studies including selecting ASIC technologies, FPGA ASIC emulation, and other system topics such as interface approaches, etc.

  • Support FPGA/RTL engineers implementing such algorithms for real time evaluation or silicon integration and Silicon SoC Architects with integration, documentation and implementation.

  • Produce detailed documents and SystemC models matching the proposed ASIC implementation, and produce detailed trade-off analyses for executive review and product roadmap decisions.

  • Travel both domestically and internationally.


  • 7+ years of experience as a Digital Design Engineer, Silicon µArchitect and Silicon Architect for production silicon shipped in volume.

  • Experience with methods for partitioning a solution across hardware and software, digital, and other multi-disciplinary boundaries in a system solution.

  • Experience evaluating architectural trade-offs such as speed, performance, power, area.

  • Experience employing scientific methods to debug, diagnose and drive the resolution of cross-disciplinary system issues.

  • BS EE/CS or equivalent in similar areas.


  • Experience with top down high-level-model to HW mapping.

  • Knowledge of industry trends and disruptive technologies.

  • Experience programming in C or C++.

  • DSP coding and optimization experience.

  • Capable of dealing with ambiguity with a fast changing consumer electronics field.

  • Results oriented, self-motivated, proactive with demonstrated creative & critical thinker.

  • Works effectively as an individual and in a multidisciplinary international team.

  • Ability to collaborate and/or lead in a team environment.

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